Simulation-based results of weighted fair queuing algorithms for ATM networks

The behavior of the ideal General Processor Sharing (GPS) discipline and di fferent per-VC queuing algorithms approximating this ideal scheme, namely t he Self Clocked Fair Queuing, the Packet by Packet Generalized Processor Sh aring, and the Virtual Starting Time disciplines, are studied in this paper via simulation. We specifically consider a simple simulation configuration involving two Constant Bit rate (CBR) connections and several ON/OFF conne ctions (bursty traffic). This simple simulation experiment allows us to poi nt out three important features of the GPS and approximating disciplines. F irst, by adequately choosing the weight coefficients, these scheduling sche mes can offer to CBR traffic almost Head of Line (HOL) priority over ON/OFF connections, to each of which, nevertheless, a minimum bandwidth is guaran teed. Second, GPS and per-VC queuing disciplines, like the simple FIFO sche me, is very sensitive to burst scale congestion phenomena. Finally, simulat ion results seem to indicate that the scheduling disciplines considered per form traffic shaping on ON/OFF connections, which drastically reduces the b urstiness of output traffic.