Citation
J. Juan-chico et al., Inertial effect handling method for CMOS digital IC simulation, ELECTR LETT, 35(23), 1999, pp. 2028-2030
Citations number
8
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194
→ ACNP
Volume
35
Issue
23
Year of publication
1999
Pages
2028 - 2030
Database
ISI
SICI code
0013-5194(19991111)35:23<2028:IEHMFC>2.0.ZU;2-S
Abstract
A method is presented for determining the occurrence of the inertial effect
(pulse filtering) in CMOS digital logic gates to overcome the limitations
of conventional approaches. It is based on accounting for individual input
gate thresholds and a new scheduling mechanism, while maintaining compatibi
lity with existing delay models.