Shallow p(+)n junctions formed by using a two-step annealing scheme with low thermal budget

Shallow p(+)n junctions have been formed by directly implanting BF2 dopant into the Si substrate and then treating the samples by an annealing scheme with low thermal budget. A junction leakage smaller than 10 nA/cm(2) can be achieved by an annealing scheme that employs low-temperature long-time fur nace annealing (FA) at 600 degrees C for 3 h followed by medium-temperature rapid thermal annealing (RTA) at 800 degrees C for 30 s. No considerable d opant diffusion is observed by using this low-thermal-budget annealing proc ess. In addition, a moderate low-temperature annealing time of about 2-3 h should be employed to optimize the shallow p(+)n junction formed by this sc heme. However, the annealing process that employs medium-temperature RTA fo llowed by low-temperature FA treatment produces worse junctions than the an nealing scheme that employs long-time FA at 600 degrees C followed by RTA a t 800 degrees C.