This paper describes automated methods for generating and editing triangula
r meshes based on a heuristic approach, These algorithms yield a triangulat
ion that allows the solution of the two-dimensional semiconductor device eq
uations very efficiently, Compared to commonly used concepts, our method de
livers a smaller number of nodes combined with an excellent representation
of the device geometry and an acceptable numeric quality of triangular elem
ents, For this purpose, a priori known anisotropic solution behavior of the
device equations at doping fronts, p-n junctions, and material interfaces
is consequently exploited in generating the initial grid. Furthermore, appr
opriate tools for the refinement of the merged grids are presented.