Dynamic snap-back induced programming failure in stacked gate flash EEPROMcells and efficient remedying technique

A new kind of programming failure is reported in stacked gate Flash EEPROM cells and its remedying scheme is presented, The failure is observed under typical bit line (B/L) disturbance bias conditions but is different from th e case of the drain turn-on induced leakage current over-burdening the char ge pumping. Rather, its root cause is identified for the first time to be t he dynamic snap-back breakdown operative in the memory cell. This snap back induced programming failure is shown effectively mitigated with the use of an appropriate series resistance in the source loop of the memory cell. Th e remedying role of the source series resistance is discussed.