Statistical device models from worst case files and electrical test data

Two statistical metal oxide semiconductors (MOS) models are described, one based on worst case files and the other on electrical test data. The former is appropriate for predicting the variability of a process early in its li fe cycle, while the latter would better track a maturing process. The key s tatistical tool that is used to develop the models is principal component a nalysis (PCA), which is used in novel ways in order to derive statistical m odels from readily available information. The models are used to perform st atistical circuit simulation in order to quantitatively predict the impact of manufacturing variations on circuit performance metrics. Due to the use of linear response surface modeling and latin hypercube sampling, the simul ation cost of using the models is about the same as with worst case simulat ion. The modeling technique is general and is applicable to other semicondu ctor devices besides MOS devices which are considered in this paper.