Testability of 2-level AND/EXOR circuits

Citation
R. Drechsler et al., Testability of 2-level AND/EXOR circuits, J ELEC TEST, 14(3), 1999, pp. 219-225
Citations number
23
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS
ISSN journal
09238174 → ACNP
Volume
14
Issue
3
Year of publication
1999
Pages
219 - 225
Database
ISI
SICI code
0923-8174(199906)14:3<219:TO2AC>2.0.ZU;2-#
Abstract
It is often stated that AND/EXORcircuits are much easier to test than AND/O R circuits. This statement, however, only holds true for circuits derived f rom restricted classes of AND/EXOR expressions, like positive polarity Reed -Muller and fixed polarity Reed-Muller expressions. For these two classes o f expressions, circuits with good deterministic testability properties are known. In this paper we show that these circuits also have good random patt ern testability attributes. An input probability distribution is given that yields a short expected test length for biased random patterns. This is th e first time theoretical results on random pattern testability are presente d for 2-level AND/EXOR circuit realizations of arbitrary Boolean functions. It turns out that analogous results cannot be expected for less restricted classes of 2-level AND/EXOR circuits. We present experiments demonstrating that generally minimized 2-level AND/OR circuits can be tested as easy (or hard) as minimized 2-level AND/EXOR circuits.