A large-signal model of self-aligned gate GaAsFET's for high-efficiency power-amplifier design

We propose a large-signal model that can simulate the power-added efficienc y of p-pocket self-aligned gate GaAs MESFET's, This model includes a new dr ain current model and a gate bias-dependent RF output resistance to express the drain conductance and its frequency dispersion at each gate bias. In a ddition, gate-source and gate-drain capacitances are modeled by functions o f two variables of gate and drain biases so as to fit the measured values o f ion implanted channels. The simulated power-added efficiency agreed with the measured value with a maximum error of 5%, The intermodulation distorti on was also simulated and the maximum difference between the simulated and measured results was reduced to one-fifth of the results simulated by the c onventional model. Practical applications were demonstrated by the load-pul l simulation and the pi/4 shift QPSK-modulated signal simulation.