Performance evaluation of analogue and digital radio-frequency stages for a DAVIC compliant modem

In this paper, we compare the performances of two different designs of a ra dio-frequency stage in a modem application: an analogue design and a digita l design. These designs have been evaluated for a particular case defined i n the DAVIC recommendation (1.544 Mbits/s rate using DQPSK). The choice of the functional blocks for a good trade-off between performance and cost, gr anting a good transmission quality, was determined from a previous study by Lambert et al. [Design of radio-frequency stages for a high rate digital m odem, ICECS'98, IEEE international Conference on Electronic Circuit and Sys tem, vol. 2, Lisbon, Portugal (IEEE1998), 1998, pp. 319-322]. This study wa s used as a starting point for the choice of the digital architecture. The functional blocks of the digital architecture have been described in VHDL a nd validated using the MaxPlusII software from Altera. The simulation of th e two full designs was performed to compare the respective benefits and inc onveniences of each design. (C) 1999 Elsevier Science Ltd. All rights reser ved.