A 110-dB-THD, 18-mW DAC using sampling of the output and feedback to reduce distortion

A one-bit digital-to-analog converter architecture is presented that reduce s distortion through the use of feedback, The only critical circuit in this architecture is identical to the first integrator of a Delta Sigma analog- to-digital converter. All other circuits in the system are embedded in the feedback loop, which reduces the effects of their nonidealities. Special at tention was given to the distortion arising from the discrete-time to conti nuous-time interface. The feedback loop is a conditionally stable system us ing multipath feedforward compensation. A total harmonic distortion of -110 dB is achieved, The signal-to-noise ratio is 114 dB in 400 Hz, and out-of- band noise is below -50 dB using only one external component. The power con sumption is 18 mW from a 5-V supply. Die area is 3.6 mm(2) in 0.6-mu m DPTM -CMOS technology.