This brief introduces a novel (or ancient) technique for highspeed arithmet
ic. The new proposed method is based on the still-used Chinese abacus. We s
how that proper electronic circuits, based on pass transistor and domino lo
gic, allow us to achieve the same functions of the Chinese abacus. Simulati
ons with a 0.35-mu m CMOS technology show that either a pipeline S-bit adde
r and 8 x 8 multiplier can run at a speed as high as 1 GHz.