ITA
ENG

On-chip sampling in CMOS integrated circuits

Authors

Delmas-Bendhia, S Caignet, F Sicard, E Roca, M

Citation

S. Delmas-bendhia et al., On-chip sampling in CMOS integrated circuits, IEEE ELMAGN, 41(4), 1999, pp. 403-406

Citations number

Categorie Soggetti

Eletrical & Eletronics Engineeing

Journal title

IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY

ISSN journal

00189375 → ACNP

Volume

Issue

Year of publication

1999

Part

Pages

403 - 406

Database

ISI

SICI code

0018-9375(199911)41:4<403:OSICIC>2.0.ZU;2-9

Abstract

This paper presents a technique for precise crosstalk delay measurement bas ed on on-chip sampling. Results obtained on a test chip fabricated in 0.7-m u m CMOS technology exhibit a 100% delay increase in a long coupled line co nfiguration.