Degradation of d.c. parameters in enhancement mode WNx self-aligned gate GaAs MESFETs under high temperature stress

Citation
Jk. Mun et al., Degradation of d.c. parameters in enhancement mode WNx self-aligned gate GaAs MESFETs under high temperature stress, MICROEL REL, 39(12), 1999, pp. 1793-1800
Citations number
19
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONICS RELIABILITY
ISSN journal
00262714 → ACNP
Volume
39
Issue
12
Year of publication
1999
Pages
1793 - 1800
Database
ISI
SICI code
0026-2714(199912)39:12<1793:DODPIE>2.0.ZU;2-O
Abstract
The effect of thermal stress on the d.c. parameter degradation of enhanceme nt mode tungsten nitride (WNx) self-aligned gate GaAs MESFETs was investiga ted. Threshold voltage, source-drain current and transconductance were meas ured during the tests. The physical properties of the device after thermal stress were analyzed by means of Auger electron spectroscopy (AES), X-ray d iffractometry to identify the degradation mechanism. The d.c. failure mode consists of an increase in the threshold voltage and a decrease in the curr ent and transconductance of the FETs. The device simulator was also used fo r analytical understanding of the d.c. parameter degradation. The simulated results showed that d.c. parameter degradation was mainly attributed to th e increase in source and drain ohmic contact resistances. From the AES anal ysis, we found that the increase of contact resistance was due to carrier c ompensation. which was caused by Ga outdiffusion and Ni indiffusion under t he ohmic contact layer. Therefore the thermally activated carrier compensat ion effects by trap generation are proposed to be the main failure mechanis m for d.c. parameter degradation of enhancement mode WNx self-aligned gate GaAs MESFETs. (C) 1999 Elsevier Science Ltd. All rights reserved.