Design of a novel synthesis filter for real-time MPEG-2 audio decoder implementation on a DSP chip

Citation
Wk. Paik et Sy. Hwang, Design of a novel synthesis filter for real-time MPEG-2 audio decoder implementation on a DSP chip, IEEE CONS E, 45(4), 1999, pp. 1119-1129
Citations number
9
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS
ISSN journal
00983063 → ACNP
Volume
45
Issue
4
Year of publication
1999
Pages
1119 - 1129
Database
ISI
SICI code
0098-3063(199911)45:4<1119:DOANSF>2.0.ZU;2-7
Abstract
This paper describes the design of a novel synthesis filter-for real-time i mplementation of MPEG-2 audio decoder on a single, programmable DSP chip. I n the first phase of our design we propose a fast subband synthesis filter bank employing a decomposed IDCT block with reduced multiplication stages, shared by both MPEG-1 and MPEG-2 decoders. In the second phase of the desig n, a parameter analyzer block is adopted to take advantage of the multichan nel computing structure in MPEG-2 thereby further reducing the number of MA C operations. In the final phase, we propose a low-cost decoder employing u northodox methods of boosting performance by gracefully degrading quality o f service. The overall runtime of the decoder has been reduced by 60% when compared to the modified ISO decoder employing a synthesis filter bank with fast IDCT block. Real-time performance validations have been made by re-tuning time-c ritical code sections for both native VLIW and DSP architectures. The final implementation successfully passes all ISO/IEC MPEG-2 audio compliance tes ts and achieves near-transparent audio decoding and signal reconstruction o n the fly.