A GA with heuristic-based decoder for IC floorplanning

In this paper, we describe a genetic algorithm with heuristic-based layout decoder (GAHD) for floorplanning in IC design. The basic idea is to make us e of a GA to search for an optimal arrangement of circuit modules on a pre- specified layout area. To achieve a GA that is efficient in floorplanning, we employ a technique to systematically determine suitable weighting coeffi cients of the search objectives in deriving a suitable objective function. For each arrangement of flexible modules derived by the GA, the aspect rati os of all the modules are fixed such that the modules when fully placed and routed will yield a floorplan that is efficient in terms of area and wirel ength. For this purpose, we designed a heuristic-based layout decoder for d etermining the optimal aspect ratio and orientation of each module. Our res ults show improvement over other reported floorplanning algorithms based on simulations of the AMI33 benchmark problem. (C) 1999 Elsevier Science B.V. All rights reserved.