Digital arithmetic using analog Cellular Neural Networks

We discuss the realization of digital arithmetic using analog arrays in the form of Cellular Neural Networks (CNNs). These networks replace the fast s witching nodes of logic gates with slewing nodes using current sources driv ing into capacitors; this provides both low current spikes and low voltage slewing rates, reducing system noise and cross-talk in low-voltage mixed-si gnal applications. In this paper we generalize the design methodology using a Symbolic Substitution (SS) technique, and we use a recently developed Do uble-Base Number System (DBNS) to illustrate our design technique. This cho ice is predicated on the fact that the DENS representation is naturally 2-d imensional and excites more degrees of freedom in the design space. Spatial configurations of the recognition/replacement patterns used in SS are defi ned based on the properties of the DENS arithmetic operation. The SS recogn ition phases are implemented by dynamic evaluation of simple conditions def ined based on an analysis of the cell dynamic routes. The replacement phase s are automatically executed through switching current which force the tran sition of cell state voltages between logic levels. In effect, we build sel f-timed logic arrays with all nodes in the system under controlled slew. Si mulation results from schematic level designs are provided to demonstrate t he effectiveness of the technique.