Two cellular architectures for integrated image sensing and processing on a single chip

Two architectures for a programmable image processor with on-chip light sen sing capability are described. The first is a VLSI implementation of a cell ular neural network. The second is a distributed dual-structure mutation of the first architecture. The distributed dual architecture leverages the sp eed of silicon against the large silicon area requirements. Moreover, the i nnovative integrated nature of the dual-structure design significantly redu ces the bottleneck and computational overload caused by data transfer from sensory focal plane to the image processor. The paper also describes VLSI c hip prototypes and test results.