A recessed source and trench drain SOI LDMOS improving the on-characteristics

An SOI (Silicon-On-Insulator) LD (Lateral Double-diffused) MOS using a rece ssed source and a trench drain is proposed to reduce the on-resistance and increase the breakdown voltage. The recessed source and the trench drain st ructure is formed by v-groove etching and RIE (Reactive Ion Etching), respe ctively. The characteristics of the proposed LDMOS are numerically calculat ed by the two-dimensional process simulator, TSUPREM4 and the device simula tor, MEDICI. In the case of 36.5 V LDMOS, the on-resistance of the proposed device is decreased by 41 % compared with that of the conventional device.