A novel shallow trench isolation technology to control inverse narrow width effect on CMOS transistors

A simple method to suppress and control the inverse narrow width effect (IN WE) of the transistor based on STI technology has been evaluated in this pa per. The zero-tilt angle BS implantation called 'Edge Implantation' is perf ormed just prior to the nitride removal after the oxide CMP in order to con trol the doping concentration at the trench edge that had been covered by t he oxide spacer. It has been confirmed that INWE of n-MOST and memory cell can easily be suppressed and controlled by this method without any device p roblems such as subthreshold kink and the device degradation effects. Also, the feasibility of using it in CMOS technology as a blanket implantation h as been evaluated conducting by experiments on the buried p-MOST.