0.13 mu m DRAM technology devices : Well and transistor characteristics

For 0.13 mu m DRAM technology devices, we studied a latchup property and a junction leakage current with different doses and energies of well implant. We found a new scaling relation between holding current (voltage) and [alp ha(NPN)+alpha(PNP)], the sum of the common base current gains of the parasi tic NPN and PNP transistors, with scaling exponents n(c) = -1.05 +/- 0.14 ( n(v) = -0.56 +/- 0.07). Both low energy and low dose well implant made the junction leakage current to be below 0.019 fA/mu m(2). Excellent NMOS (L-g = 0.18 mu m) characteristics were obtained by a single deep V-T implant. An d the surface channel PMOS (L-p = 0.18 mu m) showed good characteristics of low DIBL and swing.