Application of diamond-like carbon films to the integrated circuit fabrication process

Citation
Y. Komatsu et al., Application of diamond-like carbon films to the integrated circuit fabrication process, DIAM RELAT, 8(11), 1999, pp. 2018-2021
Citations number
6
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Material Science & Engineering
Journal title
DIAMOND AND RELATED MATERIALS
ISSN journal
09259635 → ACNP
Volume
8
Issue
11
Year of publication
1999
Pages
2018 - 2021
Database
ISI
SICI code
0925-9635(199911)8:11<2018:AODCFT>2.0.ZU;2-J
Abstract
On account of their attractive properties, amorphous diamond-like carbon (D LC) films have been developed as resist materials for lithography and as ha rd coatings. In this paper, we investigate the etching properties of DLC fi lms and the electrical properties of a pn junction fabricated using DLC fil ms. Using a parallel-plate radio frequency plasma glow discharge, methane gas w as decomposed for the deposition of the DLC films on a silicon substrate. T hen oxygen was used to etch the films. Properties, such as the etching rate and the cross-sectional profile, were evaluated by atomic force microscopy (AFM). In order to produce the diode, DLC films were applied to resist mat erials as a part of the fabrication process. The etching rate of DLC films increases with decreasing oxygen pressure. We suspect that the high etching rate at low pressure from the negative bias voltage originates from the sputtering of accelerated ionic species. The bi as voltage also increases with decreasing oxygen pressure. In order to esti mate the shape of the etched edge, AFM images and cross-sectional profiles of etched DLC films were investigated as a function of oxygen pressure. At high pressure, isotropic etching by neutral radicals occurred, as the shape of the etched edge was not vertical. The top and bottom edges coincided ve rtically at low pressure because of the high bias voltage. The yield of exc ellent pn junctions fabricated using DLC films as resist materials was inve stigated as a function of deposition and etching pressure. From the results of the characteristics of the pn junction and the yield, for the integrate d circuit fabrication process the optimum condition for both deposition and etching is at low pressure. (C) 1999 Elsevier Science S.A. All rights rese rved.