OXIDE THICKNESS-DEPENDENCE AND BIAS-DEPENDENCE OF POSTMETALLIZATION ANNEALING OF INTERFACE STATES IN METAL-OXIDE-SILICON DIODES

Fast interface states were studied in p-type, <100> oriented. Al gate metal oxide silicon (MOS) diodes with dry grown oxides in the similar to 2 to 20 nm thickness range. We show that the high frequency quasi-s tatic capacitance-voltage (C-V) method is unsuitable for characterizin g states located within 0.25 eV from the Valence band since those resp ond to a 1 MHz signal. Specially adapted C-V methods reveal that all i nterface states probed across the bandgap show similar rates of passiv ation during unbiased postmetallization anneal (PMA) independent of th e oxide thickness. For de biased PMA the passivation of states at E - E-v approximate to 0.25 eV. believed to comprise the lower level of P- b centers, is promoted by negative bias for all thicknesses used. A ma rked deviation from this behavior for states at midgap indicates that their concentration cannot be used as a generally valid measure of the P-b concentration.