The 12 x 63 pixel readout prototype chip Bier&Pastis, designed to cope with
the environment imposed on a pixel detector by high-energy proton-proton c
ollisions as expected at the Large Hadron Collider (LHC), is described. The
chip contains the full pixel cell functionality, but not yet the full peri
pheral architecture for data transfer and readout with LHC speed. Design co
nsiderations and lab tests to characterize the performance as well as some
test beam results are described. (C) 2000 Elsevier Science B.V. All rights
reserved.