An integration process of micro electro mechanical polysilicon with CMOS analog/digital circuits

A fabrication process has been developed to integrate 2 mu m-thick micro el ectro mechanical polycrystalline silicon (polysilicon) with CMOS analog/dig ital circuits. Highly conductive, stress relieved, and stress-gradient supp ressed polysilicon can be integrated without significant changes in the dev ice characteristics of MOSFETs, The thermal budget for doping and annealing the thick polysilicon is optimized in both electrical and mechanical aspec ts at a moderate temperature of 850 degrees C. Mechanical and electrical pr operties of the polysilicon are related to the deposition temperatures, the doping and annealing conditions, and the kind of sacrificial oxide. Crysta llographic properties, surface morphologies, and dopant profiles are compar ed. Device characteristics of n- and p-type MOSFETs fabricated in the integ ration process are compared with reference MOSFETs fabricated in a normal C MOS process. CMOS analog/digital circuits are also fabricated in the develo ped polysilicon integration process and measured. (C) 1999 Elsevier Science S.A. All rights reserved.