A simple method to determine the floating-body voltage of SOICMOS devices

A technique to extract the off-state floating-body (PB) voltage of silicon- on-insulator (SOI) CMOS devices is presented. The bias dependent S-paramete r measurements of a single standard FB SOI device and its equivalent circui t, along with the capacitance-voltage (C-V) measurements between the drain and source of the same device, are used to determine the FB voltage, No spe cial test structure design is needed. The technique proposes a method for t he extraction of the parasitic source, drain, and gate resistances. Using t he technique, FB voltage in excess of 0.4 V is measured in a partially depl eted (PD) NMOS device at drain voltage of 2.5 V and zero gate voltage.