Fabrication method for IC-oriented Si single-electron transistors

A new fabrication method for Si single-electron transistors (SET's) is prop osed, The method applies thermal oxidation to a Si wire with a fine trench across it on a silicon-on-insulator substrate. During the oxidation, the Si wire with the fine trench is converted, in a self-organized manner, into a twin SET structure with two single-electron islands, one along each edge o f the trench, due to position-dependent oxidation-rate modulation caused by stress:accumulation. Test devices demonstrated, at 40K, that the twin SET structure can operate as two individual SET's. Since the present method pro duces two SET's at the same time in a tiny area, It is suitable for integra ting logic circuits based on pass-transistor-type logic and CMOS-type logic , which promises to lead to the fabrication of single-electron logic LSI's.