Improvement of the quality factor of RF integrated inductors by layout optimization

A systematic method to improve the quality (Q) factor of RF integrated indu ctors is presented in this paper. The proposed method is based on the layou t optimization to minimize the series resistance of the inductor coil, taki ng into account both ohmic losses, due to conduction currents, and magnetic ally induced losses, due to Eddy currents. The technique is particularly us eful when applied to inductors in which the fabrication process includes in tegration substrate removal. However, it is also applicable to inductors on low-loss substrates, The method optimizes the width of the metal strip for each turn of the inductor coil, leading to a variable strip-width layout. The optimization procedure has been successfully applied to the design of s quare spiral inductors in a silicon-based multichip-module technology, comp lemented with silicon micromachining postprocessing. The obtained experimen tal results corroborate the validity of the proposed method. A Q factor of about 17 have been obtained for a 35-nH inductor at 1.5 GHz, with Q values higher than 40 predicted for a 20-nH inductor working at 3.5 GHz, The latte r is up to a 60% better than the best results for a single strip-width indu ctor working at the same frequency.