pn-junction delineation in Si devices using scanning capacitance spectroscopy

The scanning capacitance microscope (SCM) is a carrier-sensitive imaging to ol based upon the well-known scanning-probe microscope (SPM). As reported i n Edwards [Appl. Phys. Lett. 72, 698 (1998)], scanning capacitance spectros copy (SCS) is a new data-taking method employing an SCM. SCS produces a two -dimensional map of the electrical pn junctions in a Si device and also pro vides an estimate of the depletion width. In this article, we report a seri es of microelectronics applications of SCS in which we image submicron tran sistors, Si bipolar transistors, and shallow-trench isolation structures. W e describe two failure-analysis applications involving submicron transistor s and shallow-trench isolation. We show a process-development application i n which SCS provides microscopic evidence of the physical origins of the na rrow-emitter effect in Si bipolar transistors. We image the depletion width in a Si bipolar transistor to explain an electric field-induced hot-carrie r reliability failure. We show two sample geometries that can be used to ex amine different device properties. (C) 2000 American Institute of Physics. [S0021-8979(00)00202-4].