On efficiently producing quality tests for custom circuits in PowerPC (TM)microprocessors

Custom circuits, in contrast to those synthesized by automatic tools, are m anually designed blocks of which the performance is critical to the full ch ip operation. Testing these blocks represents a major challenge and thus a crucial time-to-market factor in today's PowerPC microprocessor design envi ronment. This paper investigates various methodologies for testing custom b locks. Issues of efficiently obtaining proper circuit models for ATPG tools as well as producing quality tests will be analyzed and discussed. Tradeof fs among various methods will be analyzed and compared. Experience and resu lts based on recent PowerPC microprocessors will be reported.