The degradation of MOS transistor operation due to soft breakdown and therm
al breakdown of the gate oxide was studied. Important transistor parameters
were monitored during homogeneous stress at elevated temperature until a b
reakdown event occurred. In case of NMOSFETs the only noticeable signature
of soft breakdown is an increase in off current due to enhanced gate induce
d drain leakage current (GIDL). A model is proposed and it is concluded tha
t this effect only arises if the soft breakdown is located within the gate-
to-drain overlap region. The influence of soft breakdown on PMOSFETs is dis
cussed based on the model of enhanced GIDL for NMOSFETs. The degradation du
e to thermal breakdown of the gate oxide was investigated in detail. As a c
onclusion, a careful selection of device parameters is necessary in order t
o detect a device breakdown caused by thermal gate oxide breakdown. (C) 200
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