Hot carrier degradation for narrow width MOSFET with shallow trench isolation

Authors
Citation
Ws. Lee et Hs. Hwang, Hot carrier degradation for narrow width MOSFET with shallow trench isolation, MICROEL REL, 40(1), 2000, pp. 49-56
Citations number
6
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONICS RELIABILITY
ISSN journal
00262714 → ACNP
Volume
40
Issue
1
Year of publication
2000
Pages
49 - 56
Database
ISI
SICI code
0026-2714(200001)40:1<49:HCDFNW>2.0.ZU;2-9
Abstract
We have investigated the hot carrier reliability characteristics of narrow width MOSFET with shallow trench isolation. In the case of maximum substrat e current condition, the lifetime of nMOSFET is slightly degraded by decrea sing the device width. However, a significant degradation of device lifetim e of the narrow width device was observed under channel hot electron condit ion (V-g = V-d). In the case of pMOSFET, we also found enhanced degradation of narrow width device under channel hot electron condition. Enhanced degr adation of MOSFETs can be explained by both the current crowding and enhanc ed charge trapping at the shallow trench isolation edge. Considering pass t ransistor in DRAM cell: the degradation of lifetime for narrow width device under high gate bias condition causes a significant impact on circuit reli ability. (C) 2000 Elsevier Science Ltd. All rights reserved.