A 1Gbit DDR-SDRAM

Citation
S. Isa et al., A 1Gbit DDR-SDRAM, NEC RES DEV, 41(1), 2000, pp. 87-92
Citations number
6
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
NEC RESEARCH & DEVELOPMENT
ISSN journal
0547051X → ACNP
Volume
41
Issue
1
Year of publication
2000
Pages
87 - 92
Database
ISI
SICI code
0547-051X(200001)41:1<87:A1D>2.0.ZU;2-C
Abstract
We have newly developed a 1Gb Double Data Rate-Synchronous DRAM (DDR-SDRAM) realizing 250Mbps/pin using a 0.18 mu m fabrication process. This 1Gb DDR- SDRAM features (1) a Bi-Directional Delay (BDD) that realizes an internal c lock generator achieving a low-jitter, small-area, and short lock time, (2) a Quad-Coupled Receiver (QCR) to reduce the internal skew between rise inp ut and fall input propagation delay time, and (3) an Inter-Bank Shared Redu ndancy Scheme (ISR) with a Variable Unit Redundancy (VUR) to increase yield .