The total-dose hardness of SOI technology is limited by radiation-induced c
harge trapping in gate, field, and SOI buried oxides. Charge trapping in th
e buried oxide can lead to back-channel leakage and makes hardening SOI tra
nsistors more challenging than hardening bulk-silicon transistors. Two aven
ues for hardening the back-channel are 1) to use specially prepared SOI bur
ied oxides that reduce the net amount of trapped positive charge or 2) to d
esign transistors that are less sensitive to the effects of trapped charge
in the buried oxide. In this work, we propose a partially-depleted SOI tran
sistor structure for mitigating the effects of trapped charge in the buried
oxide on radiation hardness. We call this structure the BUSFET - Body Unde
r Source FET. The BUSFET utilizes a shallow source and a deep drain. As a r
esult, the silicon depletion region at the back channel caused by radiation
-induced charge trapping in the buried oxide does not form a conducting pat
h between source and drain. Thus, the BUSFET structure design can significa
ntly reduce radiation-induced back-channel leakage without using specially
prepared buried oxides. Total dose hardness is achieved without degrading t
he intrinsic SEU or dose rate hardness of SOI technology. The effectiveness
of the BUSFET structure for reducing total-dose back-channel leakage depen
ds on several variables, including the top silicon film thickness and dopin
g concentration, and the depth of the source. 3-D simulations show that for
a body doping concentration of 10(18) cm(-3) a drain bias of 3 V, and a so
urce depth of 90 nm, a silicon film thickness of 180 nm is sufficient to al
most completely eliminate radiation-induced back-channel leakage. However,
for a doping concentration of 3x10(17) cm(-3), a thicker silicon film (300
nm) must be used.