A custom image convolution DSP with a sustained calculation capacity of > 1 GMAC/s and low I/O bandwidth

Citation
V. Owall et al., A custom image convolution DSP with a sustained calculation capacity of > 1 GMAC/s and low I/O bandwidth, J VLSI S P, 23(2-3), 1999, pp. 335-349
Citations number
27
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
ISSN journal
13875485 → ACNP
Volume
23
Issue
2-3
Year of publication
1999
Pages
335 - 349
Database
ISI
SICI code
1387-5485(199911)23:2-3<335:ACICDW>2.0.ZU;2-C
Abstract
A customized processor for real time image convolution has been designed to increase the performance of an instrument for automated cereal grain quali ty assessment. Image convolution requires an extensive amount of calculatio n capacity and a corresponding amount of data transfers, hard to achieve wi th standard processors in real time. Therefore, a tailored architecture wit h a streamlined dataflow has been developed with emphasis on a system desig n perspective. The designed processor has a sustained calculation capacity of > 1 GMAC/s and on-chip line buffers reduce the amount of external data t ransfers. Hence, the complexity of the designed processor has been increase d to gain a lower complexity of the complete system. To achieve powerful an d versatile filtering the size of the programmable kernel functions have be en maximized to 15 x 15.