Mixed analogue-digital artificial-neural-network architecture with on-chiplearning

The authors present a novel artificial-neural-network architecture with on- chip learning capability. The issue of straightforward design-flow integrat ion of an autonomous unit is addressed with a mixed analogue-digital approa ch, by implementing a charge-based artificial neural network which interact s with digital control and processing units. The circuit architecture and d esign-flow approach for the case of a Hamming network performing pixel-patt ern recognition are described.