A stereo audio chip using approximate processing for decimation and interpolation filters

A stereo audio chip uses approximate processing techniques in the digital d ecimation and interpolation filters to reduce its active power dissipation. One pair of analog-to-digital (A/D) converters and one pair of digital-to- analog (D/A) converters have been integrated in a die area of 10.22 mm(2) i n a 0,5-mu m CMOS technology. The total power dissipation of these converte rs without power management is 200 mW when operated from a 5-V power supply , When the signal is fully active, power reductions of 36% for decimation a nd 17% for interpolation over fixed-order filters are demonstrated. When th e signal is 40 dB below overload, power reductions of 67% for decimation an d 44% for interpolation over fixed-order filters are observed, The power re ductions are 83.1% for AID converters, and 82.7% for D/A converters, when t he signal is silent for a period of time.