CMOS stress sensors on (100) silicon

CMOS analog stress sensor circuits based upon the piezoresistive behavior o f MOSFET's are presented, On the (100) surface, these circuits provide temp erature-compensated outputs that are proportional to the in-plane normal st ress difference (sigma(11)' - sigma(22)') and the in-plane shear stress sig ma(12)'. The circuits provide high sensitivity to stress, well-localized st ress-state measurement, and direct voltage or current outputs that eliminat e the need for tedious Delta R/R measurements required with more traditiona l resistor rosettes, The theoretical and experimental results also provide design guidance for calculating and minimizing the sensitivity of tradition al analog circuits to packaging-induced die stress.