Dynamic back bias CMOS driver for low-voltage applications

A high performance CMOS driver scheme for low-voltage applications is propo sed. The threshold voltage of the MOS devices is electrically controlled in order to achieve high-speed operation dulling the transitions without incr easing the static power dissipation. The V-TH control scheme has been appli ed to the pull-up section of the driver and simulations at 0.9V and at 50MH z have shown that the proposed driver exhibits a speed advantage of 40% dur ing pull-up transitions over a conventional CMOS driver, without leading to a serious increase in the power dissipation.