A scheduler ASIC for a programmable packet switch

Citation
Ll. Zhang et al., A scheduler ASIC for a programmable packet switch, IEEE MICRO, 20(1), 2000, pp. 42-48
Citations number
10
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE MICRO
ISSN journal
02721732 → ACNP
Volume
20
Issue
1
Year of publication
2000
Pages
42 - 48
Database
ISI
SICI code
0272-1732(200001/02)20:1<42:ASAFAP>2.0.ZU;2-N
Abstract
WE DESIGNED A GENERIC, SINGLE-QUEUE SCHEDULER ENGINE FOR USE IN A PROGRAMMA BLE PACKET SWITCH/ROUTER TO HANDLE IP PACKETS, ATM CELLS, OR A COMBINATION OF BOTH. COMPRISING 275,000 GATES, THE 0.35-MICRON ASIC Is INCORPORATED INT O A PROTOTYPE PROGRAMMABLE PACKET SWITCH.