Efficient index generation for compiling two-level mappings in data-parallel programs

Citation
Kp. Shih et al., Efficient index generation for compiling two-level mappings in data-parallel programs, J PAR DISTR, 60(2), 2000, pp. 189-216
Citations number
29
Categorie Soggetti
Computer Science & Engineering
Journal title
JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING
ISSN journal
07437315 → ACNP
Volume
60
Issue
2
Year of publication
2000
Pages
189 - 216
Database
ISI
SICI code
0743-7315(200002)60:2<189:EIGFCT>2.0.ZU;2-5
Abstract
This paper presents compilation techniques used to compress holes, which ar e caused by the nonunit alignment stride in a two-level data-processor mapp ing. Holes are the memory locations mapped by useless template cells. To fu lly utilize the memory space, memory holes should be removed, In a two-leve l data-processor mapping, there is a repetitive pattern for array elements mapped onto processors. We classify blocks into classes and use a class tab le to record the distribution of each class in the first repetitive data di stribution pattern. Similarly, data distribution on a processor also has a repetitive pattern. We use a compression table to record the distribution o f each block in the first repetitive data distribution pattern on a process or. By using a class table and a compression table, hole compression can be easily and efficiently achieved. Compressing holes can save memory usage, improve spatial locality and further improve system performance, The propos ed method is efiicient, stable, and easy to implement. The experimental res ults do confirm the advantages of our proposed method over existing methods . (C) 2000 Academic Press.