A simple modelling of device speed in double-gate SOI MOSFETs

A new simple and accurate model for device speed is proposed for the first time in double-gate SOI MOSFETs. Simulation studies are done with physical and electrical parameters. Experimental results are compared with the resul ts predicted by the analytical model and good agreement is seen. A record m aximum value of transconductance in DG-SOI MOSFETs is achieved (1350 ms/mm at L-g = 0.05 mu m and T-si = 50 nm). It has been observed analytically tha t device speed higher than 1 x 10(7) cm/s is possible in DG-SOI MOSFETs at a lower silicon thickness and substrate concentration at L-g less than or e qual to 0.35 mu m by appropriate modelling of parameters. (C) 2000 Elsevier Science Ltd. All rights reserved.