Automatic test timing assignment for RAMs using linear programming

In this paper, an automatic technique for test timing assignment is propose d which is comprehensive enough to take the test objective (e.g., strictnes s of selected AC timing parameters) and the constraints from both RAM speci fication and tester into consideration. Since test timing assignment proble m could only be solved manually before, therefore, our work can significant ly reduce the efforts and costs on developing and maintaining timing module s of RAM test programs, In the proposed technique, the test timing assignme nt problem is transformed into a linear programming (LP) model, which can b e automatically solved. Examples of building LP models for an asynchronous DRAM are given to show feasibility of the proposed technique.