The S/390 G5/G6 binodal cache

The IBM S/390(R) fifth-generation CMOS-based server (more commonly known as the G5) produced a dramatic improvement in system-level performance in com parison with its predecessor, the G4, Much of this improvement can be attri buted to an innovative approach to the cache and memory hierarchy: the bino dal cache architecture. This design features shared caching and very high s ustainable bandwidths at all points in the system. It contains several inno vations in managing shared data, in maintaining high bandwidths at critical points in the system, and in sustaining high performance with unparalleled fault tolerance and recovery capabilities, This paper addresses several of these key features as they are implemented in the S/390 G5 server and its successor, the S/390 G6 server.