This paper describes the strategies and techniques used to diagnose failure
s in the IBM 600-MHz S/390(R) G5 (Generation 5) CMOS microprocessor and the
associated cache chips. The complexity, density, cycle time, and technolog
y issues related to the hardware, coupled with time-to-market requirements,
have necessitated a quick diagnostic turnaround time. Beginning with the f
irst prototype of the G5 microprocessor chip, intense chip diagnostics and
physical failure analysis (PFA) have successfully identified the root cause
s of many failures, including process, design, and random manufacturing def
ects. In this paper, three different diagnostic techniques are described th
at have enabled the G5 to achieve its objective. An example is presented fo
r each technique to demonstrate its effectiveness.