Comparative study of two-dimensional junction profiling using a dopant selective etching method and the scanning capacitance spectroscopy method

Citation
R. Mahaffy et al., Comparative study of two-dimensional junction profiling using a dopant selective etching method and the scanning capacitance spectroscopy method, J VAC SCI B, 18(1), 2000, pp. 566-571
Citations number
16
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Material Science & Engineering
Journal title
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B
ISSN journal
10711023 → ACNP
Volume
18
Issue
1
Year of publication
2000
Pages
566 - 571
Database
ISI
SICI code
1071-1023(200001/02)18:1<566:CSOTJP>2.0.ZU;2-9
Abstract
The importance to industry of a two-dimensional dopant profiling technique becomes more critical as the sizes of the devices shrink. As these techniqu es develop, their relative reliability comes into question and the only com parisons that exist are with accepted one-dimensional techniques such as se condary ion mass spectroscopy (SIMS) and spreading resistance profiling or with each other. In this article, we make one such comparison between a new ly introduced technique of scanning capacitance spectroscopy and a somewhat older technique of selective etching. Based on vastly different principles , these two techniques provide an: opportunity to learn about each through comparison. The results of the comparisons are shown to be consistent both in the qualitative shape similarities of the n-type metal-oxide semiconduct or (NMOS) data from both methods and in the quantitative agreement of the l ateral junction position under the gate to within 30 nm. The p-type metal-o xide semiconductor (PMOS) data from both techniques differ somewhat in the. channel region due to the fact that under these etching conditions the cha nnel region tends to etch out and at long times can etch out to a point com parable to the true junction. The vertical alignment with SIMS and thus wit h the etching data is within the 30 nm error margin. The general comparison between the two techniques indicates that the junction is determined at th e same point in the lateral direction for the NMOS device, and there is som e disagreement on the PMOS junction position under these conditions. (C) 20 00 American Vacuum Society. [S0734-211X(00)02001-1].