Characterization and performance comparison of the power DIMOS structure fabricated with a reduced thermal budget in 4H and 6H-SiC

In this work, a reduced thermal budget processing scheme using aluminum as the p-well dopant is investigated for the fabrication of the power DIMOS (D ouble Implanted MOSFET) in 4H and 6H-SiC in an effort to improve the on-sta te conduction. The on-stale conduction in 4H-SiC devices is limited severel y by low Values of carrier mobility at the surface as compared with 6H-SiC. Surface mobilities extracted on lateral MOSFETs indicate the mobility Valu es in 6H-SiC (40 cm(2)/Vs) are significantly higher than in 4H-SiC (5 cm(2) /Vs). Therefore, even when step-bunching is avoided through the use of a re duced thermal budget, the intrinsic surface disorder in 4H-SiC is higher th an in 6H-SiC and leads to degraded conduction at the surface. Moreover, mob ility on accumulated surfaces is higher than on inverted surfaces in both p olytypes. The relative insensitivity of surface mobility to gate bias and t emperature changes does not conform to existing models for surface mobility necessitating the development of new models to explain carrier transport a t implanted SIC surfaces. The present study suggests that unless the surfac e morphology of 4H-SiC is improved, the advantage of a higher Vertical bulk mobility in 4H cannot be exploited and 6H will remain as the polytype of c hoice for the power DIMOS fabrication in SiC. (C) 2000 Elsevier Science Ltd . All rights reserved.