A behavioral model of a 1.8-V, 6-bit flash analog-to-digital converter has
been developed based on device parameters using the g(m)/I-d methodology. T
his approach eliminates the need for recharacterization of blocks when devi
ce sizes are changed. Furthermore, the performance can be predicted with in
put only from device and process simulators eliminating the need for a circ
uit simulator and associated model parameters. signal to noise plus distort
ion ratio and differential and integral nonlinearity are predicted and veri
fied at lower resolution with a circuit simulator.