Clock multiplier using digital CMOS standard cells for high-speed digital communication systems (vol 35, pg 2073, 1999)

Citation
Y. Lee et al., Clock multiplier using digital CMOS standard cells for high-speed digital communication systems (vol 35, pg 2073, 1999), ELECTR LETT, 36(3), 2000, pp. 284-284
Citations number
1
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
36
Issue
3
Year of publication
2000
Pages
284 - 284
Database
ISI
SICI code
0013-5194(20000203)36:3<284:CMUDCS>2.0.ZU;2-X