High performance 0.1 mu m dynamic threshold MOSFET using indium channel implantation

Citation
Sj. Chang et al., High performance 0.1 mu m dynamic threshold MOSFET using indium channel implantation, IEEE ELEC D, 21(3), 2000, pp. 127-129
Citations number
7
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE ELECTRON DEVICE LETTERS
ISSN journal
07413106 → ACNP
Volume
21
Issue
3
Year of publication
2000
Pages
127 - 129
Database
ISI
SICI code
0741-3106(200003)21:3<127:HP0MMD>2.0.ZU;2-Q
Abstract
In this letter, we demonstrate a high-performance 0.1 mu m Dynamic Threshol d Voltage MOSFET (DTMOS) for ultra-low-voltage (i.e., < 0.7 V) operations. Devices are realized by using super-steep-retrograde indium-channel profile . The steep indium-implanted-channel DTMOS can achieve a large body-effect- factor and a low V-th simutaneously, which results in an excellent performa nce for the indium-implanted DTMOS.