System LSI design methods for low power LSIs

Citation
H. Yasuura et T. Ishihara, System LSI design methods for low power LSIs, IEICE TR EL, E83C(2), 2000, pp. 143-152
Citations number
29
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEICE TRANSACTIONS ON ELECTRONICS
ISSN journal
09168524 → ACNP
Volume
E83C
Issue
2
Year of publication
2000
Pages
143 - 152
Database
ISI
SICI code
0916-8524(200002)E83C:2<143:SLDMFL>2.0.ZU;2-5
Abstract
Low Power design has emerged as a both practically and theoretically attrac tive theme in modern LSI system design. This paper presents system level po wer optimization techniques. A brief survey of system level low power desig n approaches and several examples in detail are described. It reviews some techniques that have been proposed to overcome the power issue and gives gu ideline for prospective system level solutions.